集成电路设计工程师

招聘部门:

2

工作性质:
薪资范围:
发布时间: 2018-06-19
工作地址: 上海
招聘人数:

2

职位描述:

1.确定集成电路整体架构,独立完成电路的建模、设计、仿真、验证等工作

2.设计验证DSP模块

3.设计验证时钟系统和控制系统

4.规划版图布局,指导和协助layout工程师完成版图设计,确保版图达到电路设计的要求

5.和测试人员共同制定量产测试方案,并协助调试


任职要求:

1.本科及以上学历,电子工程学或微电子学专业毕业,两年以上相关工作经验者优先

2.熟悉DSP,高速数字接口,多时钟域和多电源域的设计和仿真

3.熟悉CMOS工艺集成电路设计、流片和测试流程,有流片和测试经验者优先

4.熟悉Specification, Datasheet, Test Plan, Design Review等技术文档的写作

5.熟练操作系统Unix OS, 熟练使用Virtuoso和Hspice, Verilog等设计仿真软件

6.熟悉Layout Guide,能指导版图工程师进行电路版图设计

7.有良好的英语沟通能力,与国内和国外工程师共同完成团队合作

8.有学习能力,能自我驱动,能良好沟通合作


Job Responsibilities: analog/mix-signal IC designer

1.Determine the Specification of Chip and Block;

2.Responsible for Analog/Mix-Signal IC design and simulation;

3.Responsible for Layout Guide and assist Layout engineer in finishing Layout design;

4.Determine the Test-Plan of Chip and Block, assist Product Engineer in testing the function and performance of the chip;

5.Responsible for the IC Design Documents writing.


Requirements:

1.BS or above degree in electronics or microelectronics engineering,and two years or above related working experience is preferred;

2.Familiar with Analog and Mixed-Signal IC circuit design and simulation(PLL/BGP/LDO/OSC.;

3.Familiar with CMOS Analog IC design flow (Design/Tape-out/Test.;

4.Excellent in IC Design documents writing (Specification/Datasheet/Test Plan/Design Review.;

5.Familar wit Linux/Unix OS and IC simulation tools like Cadence Spectre, Hspice, Hsim,etc.

6.Familar with Layout Guide, and assist in block and chip layout design;

7.Good English communication skills, cooperating with US and domestic engineers to accomplish chip design.


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